1. Field of the Invention
The present invention relates to a semiconductor device, and more particularly, to a bump of a semiconductor chip, a method for manufacturing the bump, and a package using the bump.
2. Description of the Related Art
As semiconductor devices become more highly integrated, the number of pads formed on the surface of a semiconductor chip increase, while the pitch between the metal pads becomes narrow. This causes various problems when the semiconductor chip is mounted on a printed circuit board (PCB).
In particular, when packaging a semiconductor chip using a chip-on-glass (COG) method, it is very difficult to reduce the pitch between the metal pads because of possible electrical shorts therebetween, as the pitch between bumps formed on the metal pad becomes narrower.
FIG. 11 is a cross-sectional view showing a conventional bump of a semiconductor chip, and FIG. 12 is a cross-sectional view of a semiconductor device mounted on a PCB with the COG method. Referring to FIGS. 11 and 12, the conventional semiconductor chip bump comprises bump metal layers 1220 and 1230 formed of a metal compound on a metal pad 1180 which is formed on a semiconductor chip 1100 in order to protrude upward with a predetermined height. Here, the reference number 1190 denotes a passivation film, which acts as a protective layer.
When the conventional semiconductor chip 1100 is mounted on a PCB 1400 through the COG method, as shown in FIG. 12, adjacent bump metal layers 1220 and 1230 become very close to each other within a critical distance. Consequently, the anisotropic conductive layer 1350 loses its role as an insulating layer and is likely to be shorted. Therefore, there are limits to which the pitch between the metal pads 1180 formed on the semiconductor device can be reduced, in designing the bump pitches using the COG method. Accordingly, the conventional bump structure has become more and more unsuitable for use in highly-integrated semiconductor chips.